Agenda

8:30 am
Opening Remarks
Session 1: Distinguished Invited Talk
8:35 am
Revolutionizing High-Performance Computing: Introducing NextSilicon's Maverick-2 Reconfigurable Accelerators – A Leap Beyond Traditional FPGAs
Ilan Tayari, NextSilicon

Abstract:
Conventional von-Neumann architectures cannot deliver the efficient performance required by today's demanding HPC and AI workloads. Dataflow and reconfigurable devices are the promising way of the future, if they could only be more developer friendly, attractive and seamless in the software ecosystem. Our keynote speaker, Ilan Tayari will tackle the hurdles on this front, and point out the novel approaches in the field, including NextSilicon's recently launched Intelligent Compute Architecture. These novel approaches will revolutionize the way application developers interact with reconfigurable heterogeneous devices.

Bio:
Ilan Tayari is co-founder and vice president of architecture at NextSilicon. He oversees NextSilicon’s research and architecture teams, and also leads all aspects of design and delivery. His teams are responsible for perfecting the system and algorithms that lie at the core of NextSilicon’s technology. Ilan is an accomplished engineer and architect, and brings 20+ years of experience leading the design and development of drivers, compilers, firmware, and software. Before NextSilicon, Ilan was a senior staff engineer (software) at Mellanox Technologies, where he led the design and development of drivers and software for a high-throughput unicast and multicast router and cryptographic-offload NIC. Before Mellanox, Ilan was a distinguished architect at Integrity Project (acquired by Mellanox Technologies) and held positions at Nocturnus Systems and Cogniview Systems. Ilan earned a Bachelor of Science degree in physics and computer science from the Hebrew University of Jerusalem, and is the author of multiple patents.
Session 2: Contributed Talks
9:40 am
Programmer productivity and performance on AMD's AI Engines: Offloading Fortran intrinsics via MLIR a case-study
Gabriel Rodriguez-Canal, Edinburgh Parallel Computing Centre (EPCC)
10:00 am
Break
Session 3: Contributed Talks
10:30 am
A Compute Graph Simulation and Implementation Framework Targeting AMD Versal AI Engines
Torben Kalkhof, Technical University of Darmstadt
10:53 am
SNAcc: An Open-Source Framework for Streaming-based Network-to-Storage Accelerators
David Volz, Technical University of Darmstadt
11:16 am
Connected-Component Labeling Using HLS for High-Energy Particle Physics Instruments
Nick Song, Washington University, St. Louis
11:38 am
An Approach to Identify Divergences in Hardware Designs for HPC Workloads
Doru Thom Popovici, Lawrence Berkeley National Laboratory
12:00 pm
Closing Remarks