Authors are invited to submit 4- or 8-page original, unpublished manuscripts to either submission track (described below) in IEEE conference format. The page limit excludes references.
Accepted manuscripts for Track 1 (the 8-page submissions) will be published by the IEEE Technical Consortium on High Performance Computing (IEEE TCHPC) and archived on IEEE Explore, as well as published on the H2RC website.
Submissions are solicited for two tracks:
Track 1 is targeted for technical papers containing a high level of implementation detail and analysis discussion of experimental results. Track 1 is suited for members of the academic and national lab community who prefer to have their work peer-reviewed, indexed and archived by IEEE.
Authors of a track 1 submission should submit original contributions of up to 8 pages excluding references in PDF format using the SC20 Linklings portal, which is also linked from the H2RC website. Submissions must be formatted as single-spaced, double-column, A4 pages without page numbers following the IEEE Conference Proceedings format, including figures, tables, and references. H2RC uses a single blind review process. We support the SC reproducibility initiative and highly encourage authors to add an artifact description/artifact evaluation appendix of up to 2 additional pages to their paper. All accepted papers will be published in the IEEE TCHPC Proceedings and will be available free of charge and indexed by the IEEE Xplore digital library.
Track 2 is targeted for industrial contributions that describe new capabilities and opportunities offered by emerging technologies and products or work in progress presentations by the academic and national lab community. The emphasis of this track is to initiate a discussion with the audience.
Authors of a track 2 submission should submit a 4-page (excluding references) extended abstract. The extended abstract will peer-reviewed and used for deciding on the acceptance of a presentation assignment of a presentation slot, but will not be published in the proceedings. The papers shall follow the same formatting instructions as the full papers and have also to be submitted using the Linklings system.
All submissions are reviewed and evaluated by at least three members of our technical program committee. From the TPC evaluation of each submission, the organizing committee will select papers for presentation based on a criteria that is equally weighted between scientific merit and level of interest and relevance to the HPC community.
Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance compute architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability.
We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers.
Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain.
A non-comprehensive list of potential topics of interest is given below: