Agenda

9:00 am

Opening Remarks

9:05 am

Keynote Session

"SYCL: A Single-Source C++ Standard for Heterogeneous Computing" [slides]
Ronan Keryell, Principal Software Engineer, Xilinx

9:45 am

Lightning Talk Session 1

"hlslib: Software Engineering for Hardware Design" [paper]
Johannes de Fine Licht, ETH Zurich

10:00 am

Coffee Break

10:30 am

Lightning Talk Session 2

"2GRVI Phalanx: A 1332-core RISC-V RV64I Processor Cluster Array with an HBM2 High Bandwidth Memory System, and an OpenCL-like Programming Model, In a Xilinx VU37P FPGA" [paper] [slides]
Jan Gray, Gray Research

"CFD Acceleration with FPGA" [paper] [slides]
Krzysztof Rojek, byteLAKE and Jamon Bowen, Xilinx

"Data Flow Pipes: A SYCL Extension for Spatial Architectures" [paper] [slides]
Michael Kinsner, Intel

11:15 am

5-minute Break

11:20 am

Academic Session 1

"It's all about data movement: Optimising FPGA data access to boost performance" [paper] [slides]
Nicholas Brown, The University of Edinburgh

"The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface" [paper] [slides]
Hamid Reza Zohouri, Tokyo Institute of Technology

"Accelerating Large Garbled Circuits on an FPGA-enabled Cloud" [paper] [slides]
Miriam Leeser, Northeastern University

12:30 pm

Lunch

2:00 pm

Invited Session

"ML Acceleration with Heterogeneous Computing for Big Data Physics Experiments" [slides]
Philip C. Harris, Massachusetts Institute of Technology

"Testbed for the Research Community Exploring Next-Generation Cloud Platforms" [slides]
Miriam Leeser, Northeastern University

3:00 pm

Coffee Break

3:30 pm

Academic Session 2

"High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud" [paper] [slides]
Lukas Sommer, Technical University Darmstadt

"Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping" [paper] [slides]
Fabien Chaix, Institute of Computer Science, Foundation for Research and Technology - Hellas

4:25 pm

Lightning Talk Session 3

"FBLAS: Streaming Linear Algebra Kernels on FPGA" [paper] [slides]
Tiziano De Matteis, ETH Zurich

4:40 pm

Academic Session 3

"Combining Perfect Shuffle and Bitonic Networks for Efficient Quantum Sorting" [paper] [slides]
Naveed Mahmud, University of Kansas

"Performance and Energy Efficiency Analysis of Reverse Time Migration on a FPGA Platform" [paper] [slides]
Joao Marcelo Silva Souza, SENAI/CIMATEC

5:30 pm

Closing Remarks